DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 787

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit
10 to 8
7, 6
Bit Name
RSTRG[2:0] 000
RTRG[1:0]
Initial
Value R/W
00
R/W
R/W
Description
RTS Output Active Trigger
When the quantity of receive data in receive FIFO data
register (SCFRDR) becomes more than the number
shown below, RTS signal is set to high.
000: 15
001: 1
010: 4
011: 6
100: 8
101: 10
110: 12
111: 14
Receive FIFO Data Trigger
•
•
Note: In clock synchronous mode, to transfer the
Section 15 Serial Communication Interface with FIFO (SCIF)
Set the quantity of receive data which sets the receive
data full (RDF) flag in the serial status register
(SCFSR). The RDF flag is set to 1 when the quantity
of receive data stored in the receive FIFO register
(SCFRDR) is increased more than the set trigger
number shown below.
Asynchronous mode •
00: 1
01: 4
10: 8
11: 14
receive data using DMAC, set the receive trigger
number to 1. If set to other than 1, CPU must
read the receive data left in SCFRDR.
Rev. 3.00 Sep. 28, 2009 Page 755 of 1650
Clock synchronous mode
00: 1
01: 2
10: 8
11: 14
REJ09B0313-0300