DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 978

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 19 Controller Area Network (RCAN-TL1)
(3)
The bit configuration registers (BCR0 and BCR1) are 2 X 16-bit read/write register that are used
to set CAN bit timing parameters and the baud rate pre-scaler for the CAN Interface.
The Time quanta is defined as:
Where: BRP (Baud Rate Pre-scaler) is the value stored in BCR0 incremented by 1 and fclk is the
used peripheral bus frequency.
• BCR1 (Address = H'004)
Bits 15 to 12 — Time Segment 1 (TSG1[3:0] = BCR1[15:12]): These bits are used to set the
segment TSEG1 (= PRSEG + PHSEG1) to compensate for edges on the CAN Bus with a positive
phase error. A value from 4 to 16 time quanta can be set.
Bit 11: Reserved. The written value should always be ‘0’ and the returned value is ‘0’.
Rev. 3.00 Sep. 28, 2009 Page 946 of 1650
REJ09B0313-0300
Bit 15:
TSG1[3]
0
0
0
0
0
:
:
1
Initial value:
Bit Configuration Register (BCR0, BCR1)
R/W:
Bit:
Timequanta =
Bit 14:
TSG1[2]
0
0
0
0
1
:
:
1
R/W
15
0
R/W
14
TSG1[3:0]
0
Bit 13:
TSG1[1]
0
0
1
1
0
:
:
1
R/W
2 * BRP
13
0
f
clk
R/W
12
0
1
0
1
Bit 12:
TSG1[0] Description
0
1
0
:
:
11
R
0
-
R/W
Setting prohibited (Initial value)
Setting prohibited
Setting prohibited
PRSEG + PHSEG1 = 4 time quanta
PRSEG + PHSEG1 = 5 time quanta
:
:
PRSEG + PHSEG1 = 16 time quanta
10
0
TSG2[2:0]
R/W
9
0
R/W
8
0
R
7
0
-
R
6
0
-
R/W
5
0
SJW[1:0]
R/W
4
0
R
3
0
-
R
2
0
-
R
1
0
-
R/W
BSP
0
0