DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 837

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16.3.7
SSTDR is an 8-bit register that stores transmit data. When 8-bit data length is selected by bits
DATS1 and DATS0 in SSCRL, SSTDR0 is valid. When 16-bit data length is selected, SSTDR0
and SSTDR1 are valid. When 32-bit data length is selected, SSTDR0 to SSTDR3 are valid. The
SSTDR that has not been enabled must not be accessed.
When the SSU detects that SSTRSR is empty, it transfers the transmit data written in SSTDR to
SSTRSR and starts serial transmission. If the next transmit data has already been written to
SSTDR during serial transmission, the SSU performs consecutive serial transmission.
Although SSTDR can always be read from or written to by the CPU and DMAC, to achieve
reliable serial transmission, write transmit data to SSTDR after confirming that the TDRE bit in
SSSR is set to 1.
Table 16.3 Correspondence between the DATS Bit Setting and SSTDR
Bit
7 to 0
SSTDR
0
1
2
3
Bit Name
SS Transmit Data Registers 0 to 3 (SSTDR0 to SSTDR3)
Valid
Invalid
Invalid
Invalid
00
Initial value:
Initial
Value
All 0
R/W:
Bit:
R/W
R/W
R/W
7
0
R/W
01
Valid
Valid
Invalid
Invalid
6
0
Description
Serial transmit data
R/W
5
0
Section 16 Synchronous Serial Communication Unit (SSU)
DATS[1:0] (SSCRL[1:0])
R/W
4
0
R/W
3
0
10
Valid
Valid
Valid
Valid
Rev. 3.00 Sep. 28, 2009 Page 805 of 1650
R/W
2
0
R/W
1
0
R/W
11 (Setting Disabled)
Invalid
Invalid
Invalid
Invalid
0
0
REJ09B0313-0300

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