DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 550

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
11.3.27 Timer Buffer Transfer Set Register (TBTER)
TBTER is an 8-bit readable/writable register that enables or disables transfer from the buffer
registers* used in complementary PWM mode to the temporary registers and specifies whether to
link the transfer with interrupt skipping operation. The MTU2 has one TBTER.
Note:
Rev. 3.00 Sep. 28, 2009 Page 518 of 1650
REJ09B0313-0300
Bit
7 to 2
1, 0
* Applicable buffer registers:
Bit Name
BTE[1:0]
TGRC_3, TGRD_3, TGRC_4, TGRD_4, and TCBR
Initial value:
Initial
Value
All 0
00
R/W:
Bit:
R
7
0
-
R/W
R
R/W
R
6
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
These bits enable or disable transfer from the buffer
registers* used in complementary PWM mode to the
temporary registers and specify whether to link the
transfer with interrupt skipping operation.
For details, see table 11.40.
R
5
0
-
R
4
0
-
R
3
0
-
R
2
0
-
R/W
1
0
BTE[1:0]
R/W
0
0

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