DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1551

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Notes: 1. Retains the previous value after an internal power-on reset by means of the WDT.
Module
Name
Power-
Down
Modes
H-UDI*
9
2. The BN3 to BN0 bits are initialized.
3. Flag handling continues.
4. Counting up continues.
5. Transfer operations can be continued.
6. Bits RTCEN and START are retained.
7. Bits BC3 to BC0 are initialized.
8. Since pin states are read out on the port A data register (PADRL) and the port registers,
9. Initialized by TRST assertion or in the Test-Logic-Reset state of the TAP controller.
10. Initialized by RES assertion and retains the previous value after an internal power-on
Register
Abbreviation
DSSSR
DSFR
DSRTR
SDIR
values in these registers are neither retained nor initialized.
reset by means of the H-UDI reset assert command or by means of the WDT.
Power-On
Reset
Initialized
Initialized*
Retained
Initialized
10
Manual
Reset
Retained
Retained
Retained
Retained
Deep
Standby
Initialized
Retained
Initialized
Initialized
Rev. 3.00 Sep. 28, 2009 Page 1519 of 1650
Software
Standby
Retained
Retained
Retained
Retained
Section 30 List of Registers
Module
Standby
Retained
REJ09B0313-0300
Sleep
Retained
Retained
Retained
Retained

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