DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 656

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
11.7.13 Counter Value during Complementary PWM Mode Stop
When counting operation is suspended with TCNT_3 and TCNT_4 in complementary PWM
mode, TCNT_3 has the timer dead time register (TDDR) value, and TCNT_4 is held at H'0000.
When restarting complementary PWM mode, counting begins automatically from the initialized
state. This explanatory diagram is shown in figure 11.108.
When counting begins in another operating mode, be sure that TCNT_3 and TCNT_4 are set to
the initial values.
11.7.14 Buffer Operation Setting in Complementary PWM Mode
In complementary PWM mode, conduct rewrites by buffer operation for the PWM cycle setting
register (TGRA_3), timer cycle data register (TCDR), and duty setting registers (TGRB_3,
TGRA_4, and TGRB_4).
In complementary PWM mode, channel 3 and channel 4 buffers operate in accordance with bit
settings BFA and BFB of TMDR_3. When TMDR_3's BFA bit is set to 1, TGRC_3 functions as a
buffer register for TGRA_3. At the same time, TGRC_4 functions as the buffer register for
TGRA_4, and TCBR functions as the TCDR's buffer register.
Rev. 3.00 Sep. 28, 2009 Page 624 of 1650
REJ09B0313-0300
Figure 11.108 Counter Value during Complementary PWM Mode Stop
TGRA_3
TCDR
TDDR
H'0000
Complementary PWM
TCNT_3
mode operation
TCNT_4
Counter
operation stop
Complementary
PMW restart
Complementary PWM
mode operation