DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 564

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
• When TGR is an input capture register
(1)
Figure 11.16 shows an example of the buffer operation setting procedure.
Rev. 3.00 Sep. 28, 2009 Page 532 of 1650
REJ09B0313-0300
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in the timer general register is transferred to the buffer register.
This operation is illustrated in figure 11.15.
Example of Buffer Operation Setting Procedure
Figure 11.16 Example of Buffer Operation Setting Procedure
Select TGR function
Set buffer operation
Input capture
signal
<Buffer operation>
Buffer operation
register
Buffer
Start count
Figure 11.15 Input Capture Buffer Operation
[1]
[2]
[3]
Timer general
[1] Designate TGR as an input capture register or
[2] Designate TGR for buffer operation with bits
[3] Set the CST bit in TSTR to 1 start the count
register
output compare register by means of TIOR.
BFA and BFB in TMDR.
operation.
TCNT

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