DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 547

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.3.24 Timer Cycle Buffer Register (TCBR)
TCBR is a 16-bit register used only in complementary PWM mode. It functions as a buffer
register for the TCDR register. The TCBR register values are transferred to the TCDR register
with the transfer timing set in the TMDR register.
Initial value:
11.3.25 Timer Interrupt Skipping Set Register (TITCR)
TITCR is an 8-bit readable/writable register that enables or disables interrupt skipping and
specifies the interrupt skipping count. The MTU2 has one TITCR.
Bit
7
6 to 4
3
Note:
R/W:
Bit:
Accessing the TCBR in 8-bit units is prohibited. Always access in 16-bit units.
Bit Name
T3AEN
3ACOR[2:0] 000
T4VEN
R/W
15
1
R/W
14
1
R/W
13
Initial value:
1
Initial
value
0
0
R/W
R/W:
12
1
Bit:
T3AEN
R/W
R/W
11
1
7
0
R/W
R/W
R/W
R/W
R/W
R/W
10
1
6
0
3ACOR[2:0]
Description
T3AEN
Enables or disables TGIA_3 interrupt skipping.
0: TGIA_3 interrupt skipping disabled
1: TGIA_3 interrupt skipping enabled
These bits specify the TGIA_3 interrupt skipping count
within the range from 0 to 7.*
For details, see table 11.38.
T4VEN
Enables or disables TCIV_4 interrupt skipping.
0: TCIV_4 interrupt skipping disabled
1: TCIV_4 interrupt skipping enabled
R/W
R/W
9
1
5
0
R/W
R/W
8
1
4
0
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
T4VEN
R/W
R/W
7
1
3
0
Rev. 3.00 Sep. 28, 2009 Page 515 of 1650
R/W
R/W
6
1
2
0
4VCOR[2:0]
R/W
R/W
5
1
1
0
R/W
R/W
4
1
0
0
R/W
3
1
REJ09B0313-0300
R/W
2
1
R/W
1
1
R/W
0
1