DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1240

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 23 USB 2.0 Host/Function Module (USB)
(h)
Write to the MBW bits in the FIFO port select registers (CFIFOSEL, D0FIFOSEL, and
D1FIFOSEL) and set the CURPIPE bits simultaneously. When the DCP setting (CURPIPE = 000)
is selected in the CFIFO register, set the CURPIPE bits or ISEL bit and write to the MBW bits
simultaneously.
Follow the procedure below to change the setting of only the MBW bits for the currently selected
pipe. However, once a buffer memory read operation has started, do not change the setting of the
MBW bits until all the data has been read.
It is possible to change the setting of only the MBW bits directly when the selected CURPIPE is
set to the buffer memory write direction. However, once a buffer memory write operation has
started, do not change the bit width from 8 bits to 16 or 32 bits, or from 16 bits to 32 bits.
• When CURPIPE of DFIFO0, DFIFO1, or CFIFO is set to other than DCP (000)
Figure 23.14 Example of Changing the MBW Setting when CURPIPE of DFIFO0, DFIFO1,
Rev. 3.00 Sep. 28, 2009 Page 1208 of 1650
REJ09B0313-0300
Method of Changing Setting of MBW Bits when Selected CURPIPE Is Set to Buffer
Memory Read Direction
[1]
[2]
[3]
MBW setting change completed
Set MBW and CURPIPE
120 ns + 5 bus cycles
Set CURPIPE to 000
Insert wait of at least
simultaneously
Start
or CFIFO Is Set to Other Than DCP (000)
[1]
[2]
[3]
Set CURPIPE to a setting other than the current setting.
Changing the CURPIPE setting in succession requires
an access cycle of at least 120 ns plus five bus cycles.
Set the MBW bits to the desired value and the CURPIPE
bits to the pipe setting preceding the change in [1].