DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 82

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 2 CPU
2.1.3
The system registers consist of four 32-bit registers: the high and low multiply and accumulate
registers (MACH and MACL), the procedure register (PR), and the program counter (PC). MACH
and MACL store the results of multiply or multiply and accumulate operations. PR stores the
return address from a subroutine procedure. PC indicates the address four bytes ahead of the
instruction being executed and controls the flow of the processing.
(1)
MACH and MACL are used as the addition value in a MAC instruction, and store the result of a
MAC or MUL instruction.
(2)
PR stores the return address of a subroutine call using a BSR, BSRF, or JSR instruction, and is
referenced by a subroutine return instruction (RTS).
(3)
PC indicates the address four bytes ahead of the instruction being executed.
Rev. 3.00 Sep. 28, 2009 Page 50 of 1650
REJ09B0313-0300
31
31
31
Multiply and Accumulate Register High (MACH) and Multiply and Accumulate
Register Low (MACL)
Procedure Register (PR)
Program Counter (PC)
System Registers
MACH
MACL
PR
PC
Figure 2.3 System Registers
0
0
0
Multiply and accumulate register high (MACH) and multiply
and accumulate register low (MACL):
Store the results of multiply or multiply and accumulate operations.
Procedure register (PR):
Stores the return address from a subroutine procedure.
Program counter (PC):
Indicates the four bytes ahead of the current instruction.