DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 337

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 9 Bus State Controller (BSC)
read in case of a 32-bit device, and 16 bits in case of a 16-bit device. When writing, only the WEn
signal for the byte to be written is asserted.
It is necessary to output the data that has been read using RD when a buffer is established in the
data bus. The RD/WR signal is in a read state (high output) when no access has been carried out.
Therefore, care must be taken when controlling the external data buffer, to avoid collision.
Figures 9.3 and 9.4 show the basic timings of normal space access. If the WM bit in CSnWCR is
cleared to 0, a Tnop cycle is inserted after the CSn space access to evaluate the external wait
(figure 9.3). If the WM bit in CSnWCR is set to 1, external waits are ignored and no Tnop cycle is
inserted (figure 9.4).
T1
T2
Tnop
T1
T2
CKIO
A25 to A0
CSn
RD/WR
RD
Read
D15 to D0
WEn
Write
D15 to D0
BS
*
DACKn
WAIT
Note: * The waveform for DACKn is when active low is specified.
Figure 9.3 Continuous Access for Normal Space 1
Bus Width = 16 Bits, Longword Access, CSnWCR.WM Bit = 0
(Access Wait = 0, Cycle Wait = 0)
Rev. 3.00 Sep. 28, 2009 Page 305 of 1650
REJ09B0313-0300