DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 599

Manufacturer Part Number

DS72030W200FPV

MPU, 32BIT, SH7203, ROMLESS, 240QFP

Manufacturer

Renesas Electronics America

Program Memory Size

Digital Ic Case Style

Supply Voltage Range

1.1V To 1.3V

Operating Temperature Range

-20Â°C To +85Â°C

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)

In complementary PWM mode, the buffer register is used to update the data in a compare register.

The update data can be written to the buffer register at any time. There are five PWM duty and

carrier cycle registers that have buffer registers and can be updated during operation.

There is a temporary register between each of these registers and its buffer register. When

subcounter TCNTS is not counting, if buffer register data is updated, the temporary register value

is also rewritten. Transfer is not performed from buffer registers to temporary registers when

TCNTS is counting; in this case, the value written to a buffer register is transferred after TCNTS

The temporary register value is transferred to the compare register at the data update timing set

with bits MD3 to MD0 in the timer mode register (TMDR). Figure 11.43 shows an example of

data updating in complementary PWM mode. This example shows the mode in which data

updating is performed at both the counter crest and trough.

When rewriting buffer register data, a write to TGRD_4 must be performed at the end of the

update. Data transfer from the buffer registers to the temporary registers is performed

simultaneously for all five registers after the write to TGRD_4.

A write to TGRD_4 must be performed after writing data to the registers to be updated, even when

not updating all five registers, or when updating the TGRD_4 data. In this case, the data written to

TGRD_4 should be the same as the data prior to the write operation.

Rev. 3.00 Sep. 28, 2009 Page 567 of 1650

REJ09B0313-0300