DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 137

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
This LSI has a clock pulse generator (CPG) that generates an internal clock (Iφ), a peripheral clock
(Pφ), and a bus clock (Bφ). The CPG consists of a crystal oscillator, PLL circuits, and divider
circuits.
4.1
• Four clock operating modes
• Three clocks generated independently
• Frequency change function
• Power-down mode control
The mode is selected from among the four clock operating modes based on the frequency
range to be used and the input clock type: the clock from crystal resonator, the external clock
or the clock for USB.
An internal clock (Iφ) for the CPU and cache; a peripheral clock (Pφ) for the on-chip
peripheral modules; a bus clock (Bφ = CKIO) for the external bus interface
Internal and peripheral clock frequencies can be changed independently using the PLL (phase
locked loop) circuits and divider circuits within the CPG. Frequencies are changed by software
using frequency control register (FRQCR) settings.
The clock can be stopped in sleep mode, software standby mode, and deep standby mode, and
specific modules can be stopped using the module standby function. For details on clock
control in the power-down modes, see section 28, Power-Down Modes.
Features
Section 4 Clock Pulse Generator (CPG)
Rev. 3.00 Sep. 28, 2009 Page 105 of 1650
Section 4 Clock Pulse Generator (CPG)
REJ09B0313-0300

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