DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 881

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
17.3.6
SAR is an 8-bit readable/writable register that selects the communications format and sets the
slave address. In slave mode with the I
upper seven bits of the first frame received after a start condition, this module operates as the slave
device.
17.3.7
ICDRT is an 8-bit readable/writable register that stores the transmit data. When ICDRT detects the
space in the shift register (ICDRS), it transfers the transmit data which is written in ICDRT to
ICDRS and starts transferring data. If the next transfer data is written to ICDRT while transferring
data of ICDRS, continuous transfer is possible.
Bit
7 to 1
0
Slave Address Register (SAR)
I
2
Bit Name
SVA[6:0]
FS
C Bus Transmit Data Register (ICDRT)
Initial value:
Initial value:
R/W:
R/W:
Initial
Value
0000000
0
Bit:
Bit:
R/W
R/W
7
0
7
1
R/W
R/W
R/W
R/W
R/W
2
C bus format, if the upper seven bits of SAR match the
6
0
6
1
R/W
R/W
5
0
5
1
Description
Slave Address
These bits set a unique address in these bits,
differing form the addresses of other slave devices
connected to the I
Format Select
0: I
1: Clocked synchronous serial format is selected
SVA[6:0]
2
R/W
R/W
C bus format is selected
4
0
4
1
R/W
R/W
3
0
3
1
Rev. 3.00 Sep. 28, 2009 Page 849 of 1650
R/W
R/W
2
0
2
1
2
C bus.
Section 17 I
R/W
R/W
1
0
1
1
R/W
R/W
FS
0
0
0
1
2
C Bus Interface 3 (IIC3)
REJ09B0313-0300

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