DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 80

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 2 CPU
2.1.2
The control registers consist of four 32-bit registers: the status register (SR), the global base
register (GBR), the vector base register (VBR), and the jump table base register (TBR).
The status register indicates instruction processing states.
The global base register functions as a base address for the GBR indirect addressing mode to
transfer data to the registers of on-chip peripheral modules.
The vector base register functions as the base address of the exception handling vector area
(including interrupts).
The jump table base register functions as the base address of the function table area.
(1)
Initial value:
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 48 of 1650
REJ09B0313-0300
R/W:
R/W:
Status Register (SR)
Bit:
Bit:
Control Registers
31
15
R
R
0
0
-
-
R/W
BO
30
14
R
31
31
31
31
0
0
-
R/W
CS
29
13
R
0
0
-
14
BO
28
12
R
R
0
0
-
-
13
CS
Figure 2.2 Control Registers
27
11
R
R
0
0
-
-
9
M
GBR
VBR
TBR
Q
8
7
26
10
R
R
0
0
-
-
6
I[3:0]
5
R/W
25
R
M
0
9
4
-
-
3
R/W
2
24
R
0
8
Q
-
-
1
S
0
T
0
0
0
R/W
23
R
0
7
1
-
Status register (SR)
Global base register (GBR)
Vector base register (VBR)
Jump table base register (TBR)
R/W
22
R
0
6
1
-
I[3:0]
R/W
21
R
0
5
1
-
R/W
20
R
0
4
1
-
19
R
R
0
3
0
-
-
18
R
R
0
2
0
-
-
R/W
17
R
0
1
S
-
-
R/W
16
R
0
0
T
-
-

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