DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 959

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
• Mailbox-0
Note: MBC[1] of MB0 is always "1".
• Mailbox-31 to 1
NMC (New Message Control): When this bit is set to ‘0’, the Mailbox of which the RXPR or
RFPR bit is already set does not store the new message but maintains the old one and sets the
UMSR correspondent bit. When this bit is set to ‘1’, the Mailbox of which the RXPR or RFPR bit
is already set overwrites with the new message and sets the UMSR correspondent bit.
Important: Please note that if a remote frame is overwritten with a data frame or vice versa could
be that both RXPR and RFPR flags (together with UMSR) are set for the same Mailbox. In this
case the RTR bit within the Mailbox Control Field should be relied upon.
Important: Please note that when the Time Triggered mode is used NMC needs to be set to ‘1’
for Mailbox 31 to allow synchronization with all incoming reference messages even when
RXPR[31] is not cleared.
NMC
0
1
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
15
15
R
R
0
0
0
0
Description
Overrun mode (Initial value)
Overwrite mode
14
14
R
R
0
0
0
0
NMC
R/W
NMC
R/W
13
13
0
0
R/W
ATX
12
12
R
0
0
0
DART
R/W
11
11
R
0
0
0
R/W
R/W
10
10
1
1
MBC[2:0]
MBC[2:0]
R/W
R
9
1
9
1
R/W
R/W
8
1
8
1
Section 19 Controller Area Network (RCAN-TL1)
R
7
0
R
0
7
0
0
Rev. 3.00 Sep. 28, 2009 Page 927 of 1650
R
6
0
R
0
6
0
0
R
5
0
R
0
5
0
0
R
4
0
R
0
4
0
0
R/W
R/W
3
0
3
0
R/W
R/W
REJ09B0313-0300
2
0
2
0
DLC[3:0]
DLC[3:0]
R/W
R/W
1
0
1
0
R/W
R/W
0
0
0
0

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