DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 561

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
11.4.2
In synchronous operation, the values in a number of TCNT counters can be rewritten
simultaneously (synchronous presetting). Also, a number of TCNT counters can be cleared
simultaneously by making the appropriate setting in TCR (synchronous clearing).
Synchronous operation enables TGR to be incremented with respect to a single time base.
Channels 0 to 4 can all be designated for synchronous operation.
(1)
Figure 11.12 shows an example of the synchronous operation setting procedure.
Example of Synchronous Operation Setting Procedure
[1] Set to 1 the SYNC bits in TSYR corresponding to the channels to be designated for synchronous
[2] When the TCNT counter of any of the channels designated for synchronous operation is written to,
[3] Use bits CCLR2 to CCLR0 in TCR to specify TCNT clearing by input capture/output compare, etc.
[4] Use bits CCLR2 to CCLR0 in TCR to designate synchronous clearing for the counter clearing source.
[5] Set to 1 the CST bits in TSTR for the relevant channels, to start the count operation.
<Synchronous presetting>
Synchronous presetting
Synchronous Operation
Synchronous operation
operation.
the same value is simultaneously written to the other TCNT counters.
Set synchronous
Figure 11.12 Example of Synchronous Operation Setting Procedure
Set TCNT
operation
selection
[1]
[2]
Synchronous clearing
<Counter clearing>
source generation
clearing source
Select counter
Start count
channel?
Clearing
Yes
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
No
[3]
[5]
Rev. 3.00 Sep. 28, 2009 Page 529 of 1650
<Synchronous clearing>
Set synchronous
counter clearing
Start count
REJ09B0313-0300
[4]
[5]

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