DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 999

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(4)
The ABACK1 and ABACK0 are 16-bit read/conditionally-write registers. These registers are used
to signal to the CPU that a mailbox transmission has been aborted as per its request. When an
abort has succeeded the RCAN-TL1 sets the corresponding bit in the ABACK register. The CPU
may clear the Abort Acknowledge bit by writing a ‘1’ to the corresponding bit location. Writing a
‘0’ has no effect. An ABACK bit position is set by the RCAN-TL1 to acknowledge that a TXPR
bit has been cleared by the corresponding TXCR bit.
• ABACK1
Note: * Only when writing a ‘1’ to clear.
Bits 15 to 0 — Notifies that the requested transmission cancellation of the corresponding Mailbox
has been performed successfully. The bit 15 to 0 corresponds to Mailbox-31 to 16 respectively.
• ABACK0
Note: * Only when writing a ‘1’ to clear.
Bits 15 to 1 — Notifies that the requested transmission cancellation of the corresponding Mailbox
has been performed successfully. The bit 15 to 1 corresponds to Mailbox-15 to 1 respectively.
Bit[15:0]:ABACK1 Description
0
1
Initial value:
Initial value:
Abort Acknowledge Register (ABACK1, ABACK0)
R/W:
R/W:
Bit:
Bit:
R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W*
R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W*
15
15
0
0
14
14
0
0
[Clearing Condition] Writing ‘1’ (Initial value)
Corresponding Mailbox has cancelled transmission of message (Data or
Remote Frame)
[Setting Condition]
Completion of transmission cancellation for corresponding mailbox
13
13
0
0
12
12
0
0
11
11
0
0
10
10
0
0
9
0
9
0
ABACK0[15:1]
ABACK1[15:0]
8
0
8
0
Section 19 Controller Area Network (RCAN-TL1)
7
0
7
0
Rev. 3.00 Sep. 28, 2009 Page 967 of 1650
6
0
6
0
5
0
5
0
4
0
4
0
3
0
3
0
REJ09B0313-0300
2
0
2
0
1
0
1
0
0
0
R
0
0
-