DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1039

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

During merged arbitrating window, event-trigger transmission is served after completion of time-
triggered transmission. For example, If transmission of Mailbox-25 is completed and CYCTR
doesn't reach TTT26, event-trigger transmission starts based on message transmission priority
specified by MCR2. TXPR of time-triggered transmission is not cleared after transmission
completion, however, that of event-triggered transmission is cleared.
(1) Clear TCNTR by TCMR0 in Event-Trigger mode
(2) Interrupt generation by TCMR0/1/2 in Event-Trigger mode
(3) Interrupt generation by TCMR0 in Time-Trigger mode
(4) Interrupt generation by TCMR1/2 in Time-Trigger mode
(5) Time-triggered transmission request in Time-Trigger mode, during bus idle
TCMR0
TCNTR
TCMR0/1/2
TCNTR
Flag/interrupt
TCMR0
TCNTR
Flag/interrupt
TCMR0/1/2
CYCTR
Flag/interrupt
Tx-Trigger Time I
CYCTR
TEW (register value)
TEW counter
Transmission request
for MBI
Transmitted message
Figure 19.23 Timing Diagram of Timer
n - 2
n - 2
n - 2
n - 2
n - 1
n - 1
n - 1
n - 1
n - 1
n
Delay = (1 Bit Timing + 8 clocks)
n + 1
n
n
n
n
0
n
n
n
n
Section 19 Controller Area Network (RCAN-TL1)
n + 1
n + 1
n + 1
n + 2
SOF
Rev. 3.00 Sep. 28, 2009 Page 1007 of 1650
0
n
2
1
to (2 Bit Timings + 11 clocks)
n + 2
n + 2
n + 2
n + 3
1
2
n + 3
n + 3
n + 3
n + 4
2
0
REJ09B0313-0300
n + 4
n + 4
n + 4
n + 5
3