DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 700

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 12 Compare Match Timer (CMT)
12.2.3
CMCNT is a 16-bit register used as an up-counter. When the counter input clock is selected with
bits CKS[1:0] in CMCSR, and the STR bit in CMSTR is set to 1, CMCNT starts counting using
the selected clock. When the value in CMCNT and the value in compare match constant register
(CMCOR) match, CMCNT is cleared to H'0000 and the CMF flag in CMCSR is set to 1.
CMCNT is initialized to H'0000 when the corresponding count start bit for a channel in the
compare match timer start register (CMSTR) is cleared from 1 to 0.
Initial value:
12.2.4
CMCOR is a 16-bit register that sets the interval up to a compare match with CMCNT.
CMCOR is initialized to H'FFFF by a power-on reset or in software standby mode, but retains its
previous value in module standby mode.
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 668 of 1650
REJ09B0313-0300
R/W:
R/W:
Bit:
Bit:
Compare Match Counter (CMCNT)
Compare Match Constant Register (CMCOR)
R/W
R/W
15
15
0
1
R/W
R/W
14
14
0
1
R/W
R/W
13
13
0
1
R/W
R/W
12
12
0
1
R/W
R/W
11
11
0
1
R/W
R/W
10
10
0
1
R/W
R/W
9
0
9
1
R/W
R/W
8
0
8
1
R/W
R/W
7
0
7
1
R/W
R/W
6
0
6
1
R/W
R/W
5
0
5
1
R/W
R/W
4
0
4
1
R/W
R/W
3
0
3
1
R/W
R/W
2
0
2
1
R/W
R/W
1
0
1
1
R/W
R/W
0
0
0
1

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