DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1142

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 23 USB 2.0 Host/Function Module (USB)
Note: When the function controller function is selected, the RWUPE, USBRST, RESUME and
Rev. 3.00 Sep. 28, 2009 Page 1110 of 1650
REJ09B0313-0300
Bit
1, 0
UACT bits must be cleared to 0.
When the host controller function is selected, the WKUP bit must be cleared to 0.
Bit Name
RHST[1:0]
Initial
Value
All 0
R/W
R
Description
Reset Handshake
These bits are used to confirm the communication
speed at which communication is being carried out
with the host controller (communication bit rate).
If the high-speed operation has been disabled (the
HSE bit in SYSCFG is cleared to 0), this module
establishes the full-speed operation without
executing the reset handshake protocol. If the high-
speed operation has been enabled (the HSE bit is
set to 1), this module executes the reset handshake
protocol (RHST = 01 during the execution) and feeds
back the execution results to these bits (11 for high-
speed operation, or 10 for full-speed operation).
00: Communication speed not decided
01: Reset handshake is being handled
10: Full-speed operation established
11: High-speed operation established
Note: If RHST is not established even though
sufficient waiting time has elapsed after USB
bus reset processing was complete (after
setting USBRST = 0), the USB cable may have
been disconnected during the USB bus reset
processing. In this case, USB bus status
should be checked with the LNST bits.

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