DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 132

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 3 Floating-Point Unit (FPU)
3.3.2
FPSCR is a 32-bit register that controls floating-point instructions, sets FPU exceptions, and
selects the rounding mode.
Initial value:
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 100 of 1650
REJ09B0313-0300
Bit
31 to 23
22
21
20
19
18
R/W:
R/W:
Bit:
Bit:
Floating-Point Status/Control Register (FPSCR)
R/W
Bit Name
QIS
SZ
PR
DN
31
15
R
0
0
-
R/W
30
14
R
0
0
-
Cause
R/W
29
13
R
0
0
-
Initial
Value
All 0
0
0
0
0
1
R/W
28
12
R
0
0
-
R/W
27
11
R
0
0
-
R/W
R
R/W
R
R/W
R/W
R
R/W
26
10
R
0
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Nonnunerical Processing Mode
0: Processes qNaN or ±∞ as such
1: Treats qNaN or ±∞ as the same as sNaN (valid only
Reserved
This bit is always read as 0. The write value should
always be 0.
Transfer Size Mode
0: Data size of FMOV instruction is 32-bits
1: Data size of FMOV instruction is a 32-bit register pair
Precision Mode
0: Floating-point instructions are executed as single-
1: Floating-point instructions are executed as double-
Denormalization Mode (Always fixed to 1 in SH2A-
FPU)
1: Denormalized number is treated as zero
Enable
R/W
25
R
0
9
0
when FPSCR.Enable.V = 1)
(64 bits)
precision operations
precision operations (graphics support instructions
are undefined)
-
R/W
24
R
0
8
0
-
R/W
23
R
0
7
0
-
R/W
R/W
QIS
22
0
6
0
R/W
21
R
0
5
0
-
R/W
R/W
Flag
20
SZ
0
4
0
R/W
R/W
19
PR
0
3
0
R/W
DN
18
R
1
2
0
R/W
R/W
RM1
17
0
1
0
Cause
R/W
R/W
RM0
16
0
0
1

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