DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 912

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 18 Serial Sound Interface (SSI)
18.3.1
SSICR is a readable/writable 32-bit register that controls the IRQ, selects the polarity status, and
sets operating mode.
Initial value:
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 880 of 1650
REJ09B0313-0300
Bit
31 to 29
28
27
26
25
R/W:
R/W:
Bit:
Bit:
Control Register (SSICR)
SCKD SWSD SCKP SWSP SPDP
R/W
31
15
Bit Name
DMEN
UIEN
OIEN
IIEN
R
0
0
-
R/W
30
14
R
0
0
-
R/W
29
13
R
0
0
-
Initial
Value
All 0
0
0
0
0
DMEN
R/W
R/W
28
12
0
0
UIEN
R/W
R/W
27
11
0
0
R/W
R
R/W
R/W
R/W
R/W
OIEN
SDTA
R/W
R/W
26
10
0
0
Description
Reserved
The read value is not guaranteed. The write value
should always be 0.
DMA Enable
Enables/disables the DMA request.
0: DMA request is disabled.
1: DMA request is enabled.
Underflow Interrupt Enable
0: Underflow interrupt is disabled.
1: Underflow Interrupt is enabled.
Overflow Interrupt Enable
0: Overflow interrupt is disabled.
1: Overflow interrupt is enabled.
Idle Mode Interrupt Enable
0: Idle mode interrupt is disabled.
1: Idle mode interrupt is enabled.
PDTA
R/W
R/W
IIEN
25
0
9
0
DIEN
R/W
R/W
DEL
24
0
8
0
R/W
23
CHNL[1:0]
R
0
7
0
-
R/W
R/W
22
0
6
0
CKDV[2:0]
R/W
R/W
21
0
5
0
DWL[2:0]
R/W
R/W
20
0
4
0
MUEN
R/W
R/W
19
0
3
0
R/W
18
R
0
2
0
-
SWL[2:0]
TRMD
R/W
R/W
17
0
1
0
R/W
R/W
16
EN
0
0
0

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