DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1099

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
• ADRMD = 0
Initial value:
Initial value:
Bit
31 to 26
25 to 0
R/W:
R/W:
Bit:
Bit:
R/W
31
15
Bit Name
ADR[25:0]
R
0
0
-
R/W
30
14
R
0
0
-
R/W
29
13
R
0
0
-
Initial
Value
All 0
All 0
R/W
28
12
R
0
0
-
R/W
27
11
R
0
0
-
R/W
R
R/W
R/W
26
10
R
0
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Sector Address Specification
Specify a sector number to be accessed when ADRMD
= 0. The sector number is converted into an address
and is output to flash memory.
When the ADRCNT2 bit in FLCMDCR = 1, the
ADR[25:0] bits are valid. When the ADRCNT2 bit in
FLCMDCR = 0, the ADR[17:0] bits are valid. For
details, see figure 22.15.
ADR[25:2] specifies the page address and ADR[1:0]
specifies the column address in sector units.
ADR[1:0] = 00: 0th byte (sector 0)
ADR[1:0] = 01: (512 + 16)th byte (sector 1)
ADR[1:0] = 10: (1024 + 32)th byte (sector 2)
ADR[1:0] = 11: (1536 + 48)th byte (sector 3)
Only the page address can be specified.
R/W
R/W
25
0
9
0
Large-block products (2048 + 64 bytes)
Small-block products (512 + 16 bytes)
Section 22 AND/NAND Flash Memory Controller (FLCTL)
R/W
R/W
24
0
8
ADR[15:0]
0
R/W
R/W
23
0
7
0
Rev. 3.00 Sep. 28, 2009 Page 1067 of 1650
R/W
R/W
22
0
6
0
R/W
R/W
21
ADR[25:16]
0
5
0
R/W
R/W
20
0
4
0
R/W
R/W
19
0
3
0
REJ09B0313-0300
R/W
R/W
18
0
2
0
R/W
R/W
17
0
1
0
R/W
R/W
16
0
0
0

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