DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 542

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Table 11.36 TIOC4B Output Level Select Function
11.3.19 Timer Output Level Buffer Register (TOLBR)
TOLBR is an 8-bit readable/writable register that functions as a buffer for TOCR2 and specifies
the PWM output level in complementary PWM mode and reset-synchronized PWM mode.
Rev. 3.00 Sep. 28, 2009 Page 510 of 1650
REJ09B0313-0300
Bit 0
OLS1P
0
1
Bit
7, 6
5
4
3
2
1
0
Bit Name
OLS3N
OLS3P
OLS2N
OLS2P
OLS1N
OLS1P
Initial Output
High level
Low level
Initial value:
Initial
value
All 0
0
0
0
0
0
0
R/W:
Bit:
Active Level
Low level
High level
R
7
0
-
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R
6
0
-
OLS3N OLS3P OLS2N OLS2P OLS1N OLS1P
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Specifies the buffer value to be transferred to the
OLS3N bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS3P bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS2N bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS2P bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS1N bit in TOCR2.
Specifies the buffer value to be transferred to the
OLS1P bit in TOCR2.
R/W
5
0
Up Count
Low level
High level
R/W
Function
4
0
R/W
3
0
Compare Match Output
R/W
2
0
R/W
1
0
R/W
0
0
Down Count
High level
Low level

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