DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 763

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Bit
3
2
1, 0
Bit Name
STOP
CKS[1:0]
Initial
Value
0
0
00
R/W
R/W
R
R/W
Description
Stop Bit Length
Selects one or two bits as the stop bit length in
asynchronous mode. This setting is used only in
asynchronous mode. It is ignored in clock synchronous
mode because no stop bits are added.
When receiving, only the first stop bit is checked,
regardless of the STOP bit setting. If the second stop
bit is 1, it is treated as a stop bit, but if the second stop
bit is 0, it is treated as the start bit of the next incoming
character.
0: One stop bit
1: Two stop bits
Reserved
This bit is always read as 0. The write value should
always be 0.
Clock Select
Select the internal clock source of the on-chip baud rate
generator. For further information on the clock source,
bit rate register settings, and baud rate, see section
15.3.8, Bit Rate Register (SCBRR).
00: Pφ
01: Pφ/4
10: Pφ/16
11: Pφ/64
Note: Pφ: Peripheral clock
Section 15 Serial Communication Interface with FIFO (SCIF)
When transmitting, a single 1-bit is added at the end
of each transmitted character.
When transmitting, two 1 bits are added at the end of
each transmitted character.
Rev. 3.00 Sep. 28, 2009 Page 731 of 1650
REJ09B0313-0300

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