DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1585

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 31.24 Synchronous DRAM Burst Read Bus Cycle (Four Read Cycles)
A12/A11
D31 to D0
A25 to A0
TENDn*
Notes: 1. An address pin to be connected to pin A10 of SDRAM.
RASU/L
CASU/L
(Auto Precharge, CAS Latency 2, WTRCD = 0 Cycle, WTRP = 1 Cycle)
RD/WR
DQMxx
DACKn
CKIO
CKE
CSn
BS
*
2. The waveform for DACKn and TENDn is when active low is specified.
1
2
t
t
t
AD1
t
t
AD1
RASD1
t
RWD1
t
DQMD1
DACD
CSD1
address
Tr
Row
t
t
AD1
t
t
t
AD1
RASD1
CASD1
BSD
Tc1
READ command
(High)
t
AD1
Tc2
address
Column
t
AD1
Td1
Tc3
t
RDS2
t
t
RDH2
t
AD1
AD1
command
Td2
(1 to 4)
Tc4
READA
Rev. 3.00 Sep. 28, 2009 Page 1553 of 1650
t
t
t
AD1
CASD1
BSD
Td3
Section 31 Electrical Characteristics
Td4
t
RDS2
t
t
t
DQMD1
RDH2
CSD1
t
DACD
Tde
t
t
AD1
RWD1
REJ09B0313-0300

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