DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1393

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.2.12 SSI Oversampling Clock Selection Register (SCSR)
SCSR is a 16-bit readable/writable register that selects the clock source and division ratio of
oversampling clock used in the SSI.
Initial value:
Bit
15
14 to 12
11
10 to 8
7
6 to 4
3
R/W:
Bit:
Bit Name
⎯
SSI3CKS
[2:0]
⎯
SSI2CKS
[2:0]
⎯
SSI1CKS
[2:0]
⎯
15
R
0
-
R/W
14
0
SSI3CKS[2:0]
R/W
13
0
Initial
Value
0
000
0
000
0
000
0
R/W
12
0
11
R
0
-
R/W
R
R/W
R
R/W
R
R/W
R
R/W
10
0
SSI2CKS[2:0]
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
SSI ch3 Clock Select
Select the source of the oversampling clock that is
used in channel 3 of the SSI. For settings, see table
25.8.
Reserved
This bit is always read as 0. The write value should
always be 0.
SSI ch2 Clock Select
Select the source of the oversampling clock that is
used in channel 2 of the SSI. For settings, see table
25.8.
Reserved
This bit is always read as 0. The write value should
always be 0.
SSI ch1 Clock Select
Select the source of the oversampling clock that is
used in channel 1 of the SSI. For settings, see table
25.8.
Reserved
This bit is always read as 0. The write value should
always be 0.
9
0
R/W
8
0
R
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 1361 of 1650
R/W
Section 25 Pin Function Controller (PFC)
6
0
SSI1CKS[2:0]
R/W
5
0
R/W
4
0
R
3
0
-
REJ09B0313-0300
R/W
2
0
SSI0CKS[2:0]
R/W
1
0
R/W
0
0