DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 975

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit 0 — Reset Request (MCR0): Controls resetting of the RCAN-TL1 module. When this bit is
changed from ‘0’ to ‘1’ the RCAN-TL1 controller enters its reset routine, re-initialising the
internal logic, which then sets GSR3 and IRR0 to notify the reset mode. During a re-initialisation,
all user registers are initialised.
RCAN-TL1 can be re-configured while this bit is set. This bit has to be cleared by writing a ‘0’ to
join the CAN bus. After this bit is cleared, the RCAN-TL1 module waits until it detects 11
recessive bits, and then joins the CAN bus. The Baud Rate needs to be set up to a proper value in
order to sample the value on the CAN Bus.
After Power On Reset, this bit and GSR3 are always set. This means that a reset request has been
made and RCAN-TL1 needs to be configured.
The Reset Request is equivalent to a Power On Reset but controlled by Software.
(2)
The General Status Register (GSR) is a 16-bit read-only register that indicates the status of
RCAN-TL1.
• GSR (Address = H'002)
Bits 15 to 6: Reserved. The written value should always be ‘0’ and the returned value is ‘0’.
Bit 5 — Error Passive Status Bit (GSR5): Indicates whether the CAN Interface is in Error
Passive or not. This bit will be set high as soon as the RCAN-TL1 enters the Error Passive state
and is cleared when the module enters again the Error Active state (this means the GSR5 will stay
high during Error Passive and during Bus Off). Consequently to find out the correct state both
GSR5 and GSR0 must be considered.
Bit 0: MCR0
0
1
Initial value:
General Status Register (GSR)
R/W:
Bit:
15
R
0
-
14
R
0
-
Description
Clear Reset Request
CAN Interface reset mode transition request (Initial value)
13
R
0
-
12
R
0
-
11
R
0
-
10
R
0
-
R
9
0
-
R
8
0
-
Section 19 Controller Area Network (RCAN-TL1)
R
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 943 of 1650
R
6
0
-
GSR5
R
5
0
GSR4
R
4
0
GSR3
R
3
1
GSR2
REJ09B0313-0300
R
2
1
GSR1
R
1
0
GSR0
R
0
0