DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 916

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 18 Serial Sound Interface (SSI)
Rev. 3.00 Sep. 28, 2009 Page 884 of 1650
REJ09B0313-0300
Bit
9
8
7
Bit Name
PDTA
DEL
Initial
Value
0
0
0
R/W
R/W
R/W
R
Description
Serial Data Delay
0: 1 clock cycle delay between SSIWS and SSIDATA
1: No delay between SSIWS and SSIDATA
Reserved
The read value is undefined. The write value should
always be 0.
DWL = 010, 011, 100, 101 (with a data word length
of 18, 20, 22 or 24 bits), PDTA = 0 (left-aligned)
The data bits used in SSIRDR or SSITDR are the
following:
Bits 31 down to (32 minus the number of bits in the
data word length specified by DWL).
That is, If DWL = 011, the data word length is 20
bits; therefore, bits 31 to 12 in either SSIRDR or
SSITDR are used. All other bits are ignored or
reserved.
DWL = 010, 011, 100, 101 (with a data word length
of 18, 20, 22 or 24 bits), PDTA = 1 (right-aligned)
The data bits used in SSIRDR or SSITDR are the
following:
Bits (the number of bits in the data word length
specified by DWL minus 1) to 0
i.e. if DWL = 011, then DWL = 20 and bits 19 to 0
are used in either SSIRDR or SSITDR. All other bits
are ignored or reserved.
DWL = 110 (with a data word length of 32 bits), the
PDTA setting is ignored.
All data bits in SSIRDR or SSITDR are used on the
audio serial bus.

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