DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 144

no-image

DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 4 Clock Pulse Generator (CPG)
Notes:
Caution: Do not use this LSI for frequency settings other than those in table 4.3.
Rev. 3.00 Sep. 28, 2009 Page 112 of 1650
REJ09B0313-0300
Clock
Operating
Mode
2
3
FRQCR
Setting*
H'x206
H'x215
H'x216
H'x003
H'x004
H'x005
H'x006
H'x104
H'x106
H'x205
H'x206
H'x215
H'x216
1. x in the FRQCR register setting depends on the set value in bits 12 and 13.
2. The ratio of clock frequencies, where the input clock frequency is assumed to be 1.
3. In mode 0 or 1, the frequency of the EXTAL pin input clock or the crystal resonator
In mode 2, the frequency of the CKIO pin input clock.
In mode 3, the frequency of the USB_X1 pin input clock or the crystal resonator
1
PLL
Frequency
Multiplier
PLL
Circuit
ON (× 16)
ON (× 16)
ON (× 16)
ON (× 8)
ON (× 8)
ON (× 8)
ON (× 8)
ON (× 12)
ON (× 12)
ON (× 16)
ON (× 16)
ON (× 16)
ON (× 16)
Ratio of
Internal Clock
Frequencies
(I:B:P)*
4:1:1/3
2:1:1/2
2:1:1/3
2:1:1/2
2:1:1/3
2:1:1/4
2:1:1/6
3:1:1/2
3:1:1/4
4:1:1/2
4:1:1/3
2:1:1/2
2:1:1/3
2
Input Clock*
40 to 50
40 to 50
40 to 50
48
48
48
48
48
48
48
48
48
48
3
Output Clock
(CKIO Pin)
48
48
48
48
48
48
48
48
48
48
Selectable Frequency Range (MHz)
Internal Clock
(Iφ)
160 to 200
80 to 100
80 to 100
96
96
96
96
144
144
192
192
96
96
Bus Clock (Bφ)
40 to 50
40 to 50
40 to 50
48
48
48
48
48
48
48
48
48
48
Peripheral
Clock (Pφ)
13.33 to 16.67
20 to 25
13.33 to 16.67
24
16
12
8
24
12
24
16
24
16

Related parts for DS72030W200FPV