DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 79

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2.1
The register set consists of sixteen 32-bit general registers, four 32-bit control registers, and four
32-bit system registers.
2.1.1
Figure 2.1 shows the general registers.
The sixteen 32-bit general registers are numbered R0 to R15. General registers are used for data
processing and address calculation. R0 is also used as an index register. Several instructions have
R0 fixed as their only usable register. R15 is used as the hardware stack pointer (SP). Saving and
restoring the status register (SR) and program counter (PC) in exception handling is accomplished
by referencing the stack using R15.
Notes: 1. R0 functions as an index register in the indexed register indirect addressing mode and indexed GBR indirect
2. R15 functions as a hardware stack pointer (SP) during exception processing.
addressing mode. In some instructions, R0 functions as a fixed source register or destination register.
Register Configuration
General Registers
31
Figure 2.1 General Registers
Section 2 CPU
R15, SP (hardware stack pointer)
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
*1
*2
Rev. 3.00 Sep. 28, 2009 Page 47 of 1650
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REJ09B0313-0300
Section 2 CPU

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