DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 111

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Instruction
EXTU.B
EXTU.W
MAC.L
MAC.W
MUL.L
MULR
MULS.W
MULU.W
NEG
NEGC
SUB
SUBC
SUBV
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
@Rm+,@Rn+
@Rm+,@Rn+
Rm,Rn
R0,Rn
Rm,Rn
Rm,Rn
Instruction Code
0110nnnnmmmm1100
0110nnnnmmmm1101
0000nnnnmmmm1111
0100nnnnmmmm1111
0000nnnnmmmm0111
0100nnnn10000000
0010nnnnmmmm1111
0010nnnnmmmm1110
0110nnnnmmmm1011
0110nnnnmmmm1010
0011nnnnmmmm1000
0011nnnnmmmm1010
0011nnnnmmmm1011
Operation
Byte in Rm is
zero-extended → Rn
Word in Rm is
zero-extended → Rn
Signed operation of (Rn) ×
(Rm) + MAC → MAC
32 × 32 + 64 → 64 bits
Signed operation of (Rn) ×
(Rm) + MAC → MAC
16 × 16 + 64 → 64 bits
Rn × Rm → MACL
32 × 32 → 32 bits
R0 × Rn → Rn
32 × 32 → 32 bits
Signed operation of Rn × Rm
→ MACL
16 × 16 → 32 bits
Unsigned operation of Rn ×
Rm → MACL
16 × 16 → 32 bits
0-Rm → Rn
0-Rm-T → Rn, borrow → T
Rn-Rm → Rn
Rn-Rm-T → Rn, borrow → T
Rn-Rm → Rn, underflow → T
Rev. 3.00 Sep. 28, 2009 Page 79 of 1650
Execu-
tion
Cycles
1
1
4
3
2
2
1
1
1
1
1
1
1
T Bit
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Borrow Yes
⎯
Borrow Yes
Over-
flow
REJ09B0313-0300
SH2,
SH2E SH4 SH-2A
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Section 2 CPU
Compatibility
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes