DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1027

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
19.4.3
• Message Transmission Request
The following sequence is an example to transmit a CAN frame onto the bus. As described in the
previous register section, please note that IRR8 is set when one of the TXACK or ABACK bits is
set, meaning one of the Mailboxes has completed its transmission or transmission abortion and is
now ready to be updated for the next transmission, whereas, the GSR2 means that there is
currently no transmission request made (No TXPR flags set).
• Internal Arbitration for transmission
The following diagram explains how RCAN-TL1 manages to schedule transmission-requested
messages in the correct order based on the CAN identifier. ‘Internal arbitration’ picks up the
highest priority message amongst transmit-requested messages.
Message Transmission Sequence
RCAN-TL1 is in Tx_Rx Mode
Write '1' to the TXPR[x] bit
Update Message Data of
at any desired time
'x' Highest Priority?
Transmission Start
Internal Arbitration
(MBC[x] = 0)
Mailbox[x]
Yes
CAN Bus
Arbitration
Figure 19.16 Transmission request
No
Mailbox[x] is ready
to be updated for
next transmission
Clear TXACK[x]
TXACK[x] set?
IRR8 set?
Section 19 Controller Area Network (RCAN-TL1)
Yes
Yes
End Of Frame
Rev. 3.00 Sep. 28, 2009 Page 995 of 1650
No
No
CAN Bus
Waiting for
Waiting for
Interrupt
Interrupt
REJ09B0313-0300

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