DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 869

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
17.3.1
ICCR1 is an 8-bit readable/writable register that enables or disables the I
controls transmission or reception, and selects master or slave mode, transmission or reception,
and transfer clock frequency in master mode.
ICCR1 is initialized to H'00 by a power-on reset.
Channel Register Name
3
Bit
7
6
I
I
I
I
I
I
Slave address register
I
I
NF2CYC register
2
Bit Name
ICE
RCVD
2
2
2
2
2
2
2
C Bus Control Register 1 (ICCR1)
C bus control register 1
C bus control register 2
C bus mode register
C bus interrupt enable register ICIER_3
C bus status register
C bus transmit data register
C bus receive data register
Initial value:
Initial
Value
0
0
R/W:
Bit:
R/W
ICE
7
0
R/W
R/W
R/W
RCVD
R/W
6
0
Description
I
0: This module is halted.
1: This bit is enabled for transfer operations. (SCL and
Reception Disable
Enables or disables the next operation when TRS is 0
and ICDRR is read.
0: Enables next reception
1: Disables next reception
R/W
MST
Abbreviation R/W
ICCR1_3
ICCR2_3
ICMR_3
ICSR_3
SAR_3
ICDRT_3
ICDRR_3
NF2CYC_3
2
C Bus Interface 3 Enable
5
0
SDA pins are bus drive state.)
R/W
TRS
4
0
R/W
3
0
Rev. 3.00 Sep. 28, 2009 Page 837 of 1650
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2
0
CKS[3:0]
Section 17 I
R/W
Initial
Value Address
H'00
H'7D
H'38
H'00
H'00
H'00
H'FF
H'FF
H'00
1
0
R/W
2
C bus interface 3,
0
0
H'FFFEEC00 8
H'FFFEEC01 8
H'FFFEEC02 8
H'FFFEEC03 8
H'FFFEEC04 8
H'FFFEEC05 8
H'FFFEEC06 8
H'FFFEEC07 8
H'FFFEEC08 8
2
C Bus Interface 3 (IIC3)
REJ09B0313-0300
Access
Size

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