DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1401

no-image

DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
26.3.2
PBDRL is a 16-bit readable/writable register that stores port B data. The PB12DR to PB0DR bits
correspond to the PB12/WDTOVF/IRQOUT/REFOUT/UBCTRG to PB0/SCL0/PINT0/IRQ0
pins, respectively.
When a pin function is general output, if a value is written to PBDRL, that value is output directly
from the pin, and if PBDRL is read, the register value is returned directly regardless of the pin
state.
When a pin function is general input, if PBDRL is read, the pin state, not the register value, is
returned directly. If a value is written to PBDRL, although that value is written into PBDRL, it
does not affect the pin state. Table 26.4 summarizes PBDRL read/write operations.
Initial value:
Bit
15 to 13
12
11
10
9
8
7
6
5
4
3
2
1
Note:
R/W:
Bit:
*
Depends on the state of the external pin.
Port B Data Register L (PBDRL)
15
R
0
-
Bit Name
PB12DR
PB11DR
PB10DR
PB9DR
PB8DR
PB7DR
PB6DR
PB5DR
PB4DR
PB3DR
PB2DR
PB1DR
14
R
0
-
13
R
0
-
Initial
Value
All 0
0
0
0
0
0
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
Pin state R
PB12
R/W
12
DR
0
PB11
R/W
DR
11
0
R/W
R
R/W
R/W
R/W
R/W
R/W
PB10
R/W
DR
10
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
See table 26.4.
R/W
PB9
DR
9
0
R/W
PB8
DR
8
0
PB7
DR
R
7
*
Rev. 3.00 Sep. 28, 2009 Page 1369 of 1650
PB6
DR
R
6
*
PB5
DR
R
5
*
PB4
DR
R
4
*
PB3
DR
R
3
*
Section 26 I/O Ports
REJ09B0313-0300
PB2
DR
R
2
*
PB1
DR
R
1
*
PB0
DR
R
0
*

Related parts for DS72030W200FPV