DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1454

no-image

DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 28 Power-Down Modes
28.2.14 Retention On-Chip RAM Trimming Register (DSRTR)
DSRTR is an 8-bit readable/writable register used to trim the standby current for the on-chip RAM
for data retention in deep standby mode. Only byte access is valid.
To retain data on the on-chip RAM for data retention in deep standby mode, be sure to write H'09
to this register before making a transition to deep standby mode.
This register is initialized after the assertion of the RES pin or exit from deep standby mode.
Note: When writing to this register, see section 28.4, Usage Notes.
Rev. 3.00 Sep. 28, 2009 Page 1422 of 1650
REJ09B0313-0300
Bit
7
6 to 0
Bit Name
TRMD[6:0]
Initial value:
Initial
Value
0
All 0
R/W:
Bit:
R
7
0
-
R/W
R
R/W
R/W
6
0
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Retention On-Chip RAM Trimming Data
These bits trim the standby current for the on-chip
RAM for data retention in deep standby mode.
5
0
R/W
4
0
TRMD[6:0]
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0

Related parts for DS72030W200FPV