DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1310

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 24 LCD Controller (LCDC)
24.4.4
1. Packed 1bpp (Pixel Alignment in Byte is Big Endian) [Windows CE Recommended Format]
2. Packed 2bpp (Pixel Alignment in Byte is Big Endian) [Windows CE Recommended Format]
3. Packed 4bpp (Pixel Alignment in Byte is Big Endian) [Windows CE Recommended Format]
4. Packed 1bpp (Pixel Alignment in Byte is Little Endian)
Rev. 3.00 Sep. 28, 2009 Page 1278 of 1650
REJ09B0313-0300
Address
+00
+01
+02
+03
+LAO+00
+LAO+01
+LAO+02
+LAO+03
Address
+00
+01
+02
+03
+LAO+00
+LAO+01
+LAO+02
+LAO+03
Address
+00
+01
+02
+03
+LAO+00
+LAO+01
+LAO+02
+LAO+03
Address
+00
+01
+02
+03
+LAO+00
+LAO+01
+LAO+02
+LAO+03
Data Format
MSB
P00
P08
P10
P18
MSB
MSB
MSB
P07
P17
P00
P04
P10
P14
7
7
7
7
P01 P02 P03 P04 P05 P06 P07
P11 P12 P13 P14 P15 P16 P17
P06 P05 P04 P03 P02 P01 P00
P16 P15 P14 P13 P12 P11 P10
6
6
6
6
P00
P02
P04
P10
P12
P14
Display Memory
Display Memory
Display Memory
Display Memory
P01
P05
P11
P15
5
5
5
5
4
4
4
4
3
3
P02
P06
P12
P16
3
3
P01
P03
P05
P11
P13
P15
2
2
2
2
1
1
P03
P07
P13
P17
1
1
P08
P18
LSB
LSB
LSB
LSB
0
0
0
0
[Bit]
(Byte0)
(Byte1)
[Bit]
(Byte0)
(Byte1)
[Bit]
(Byte0)
(Byte1)
(Byte2)
[Bit]
(Byte0)
(Byte1)
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
↓ Top Left Pixel
↓ Top Left Pixel
↓ Top Left Pixel
↓ Top Left Pixel
LAO: Line Address Offset
LAO: Line Address Offset
LAO: Line Address Offset
LAO: Line Address Offset
Pn=Pn[1:0]: Put 2-bit data
Pn=Pn[3:0]: Put 4-bit data
Pn: Put 1-bit data
Pn: Put 1-bit data
—Unused bits should be 0
—Unused bits should be 0
—Unused bits should be 0
—Unused bits should be 0
Display
Display
Display
Display

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