DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 816

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 15 Serial Communication Interface with FIFO (SCIF)
• Transmitting and Receiving Serial Data Simultaneously (Clock Synchronous Mode)
Rev. 3.00 Sep. 28, 2009 Page 784 of 1650
REJ09B0313-0300
Figure 15.18 shows a sample flowchart for transmitting and receiving serial data
simultaneously.
Use the following procedure for the simultaneous transmission/reception of serial data, after
enabling the SCIF for transmission/reception.
Figure 15.18 Sample Flowchart for Transmitting/Receiving Serial Data
No
No
No
Start of transmission and reception
End of transmission and reception
Write transmit data to SCFTDR,
read TDFE and TEND flags
and then clear the flags to 0
Read ORER flag in SCLSR
Read TDFE flag in SCFSR
Read RDF flag in SCFSR
SCFRDR, and clear RDF
Clear TE and RE bits
Read receive data in
flag in SCFSR to 0
All data received?
in SCFSR as 1,
in SCSCR to 0
ORER = 1?
Initialization
TDFE = 1?
RDF = 1?
Yes
No
Yes
Yes
[1]
Error handling
[4]
[3]
Yes
[2]
Note:
[1] SCIF status check and transmit data
[2] Receive error handling:
[3] SCIF status check and receive data
[4] Serial transmission and reception
Read SCFSR and check that the
To continue serial transmission and
write:
TDFE flag is set to 1, then write
transmit data to SCFTDR. Clear the
TDFE and TEND flags to 0 after
reading them as 1. The transition of
the TDFE flag from 0 to 1 can also be
identified by
empty interrupt (TXI).
identify any error, perform the
appropriate error handling, then clear
the ORER flag to 0. Reception cannot
be resumed while the ORER flag is
set to 1.
read:
flag = 1, then read the receive data in
SCFRDR, and clear the RDF flag to
0. The transition of the RDF flag from
0 to 1 can also be identified by
receive FIFO data full interrupt
(RXI).
continuation procedure:
reception, read 1 from the RDF flag
and the receive data in SCFRDR, and
clear the RDF flag to 0 before
receiving the MSB in the current
frame. Similarly, read 1 from the
TDFE flag to confirm that writing is
possible before transmitting the MSB
in the current frame. Then write data
to SCFTDR and clear the TDFE flag
to 0.
Read the ORER flag in SCLSR to
Read SCFSR and check that RDF
When switching from a transmit operation
or receive operation to simultaneous
transmission and reception operations,
clear the TE and RE bits to 0, and then
set them simultaneously to 1.
a transmit FIFO data
a