DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 971

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

This bit can be modified only in reset mode.
Bit 14 — Auto Halt Bus Off (MCR14): If both this bit and MCR6 are set, MCR1 is
automatically set as soon as RCAN-TL1 enters BusOff.
This bit can be modified only in reset mode.
Bit 13 — Reserved. The written value should always be ‘0’ and the returned value is ‘0’.
Bit 12 — Reserved. The written value should always be ‘0’ and the returned value is ‘0’.
Bit 11 — Reserved. The written value should always be ‘0’ and the returned value is ‘0’.
Bits 10 to 8 — Test Mode (TST[2:0]): This bit enables/disables the test modes. Please note that
before activating the Test Mode it is requested to move RCAN-TL1 into Halt mode or Reset
mode. This is to avoid that the transition to Test Mode could affect a transmission/reception in
progress. For details, please refer to section 19.4.1, Test Mode Settings.
Please note that the test modes are allowed only for diagnosis and tests and not when RCAN-TL1
is used in normal operation.
Bit14: MCR14
0
1
MCR15 (ID Reorder) = 0
MCR15 (ID Reorder) = 1
H'100 + N * 32
H'102 + N * 32
H'104 + N * 32
H'106 + N * 32
H'100 + N * 32
H'102 + N * 32
H'104 + N * 32
H'106 + N * 32
LAFM
IDE_
IDE
15
15
0
0
RTR
14
14
0
13
13
0
0
Description
RCAN-TL1 remains in BusOff for normal recovery sequence (128 x 11
Recessive Bits) (Initial value)
RCAN-TL1 moves directly into Halt Mode after it enters BusOff if MCR6 is
set.
12
12
11
11
10
10
STDID_LAFM[10:0]
STDID_LAFM[10:0]
EXTID_LAFM[15:0]
EXTID_LAFM[15:0]
STDID[10:0]
STDID[10:0]
Figure 19.10 ID Reorder
EXTID[15:0]
EXTID[15:0]
9
9
8
8
7
7
6
6
5
5
Section 19 Controller Area Network (RCAN-TL1)
4
4
RTR
3
3
0
Rev. 3.00 Sep. 28, 2009 Page 939 of 1650
LAFM
IDE_
IDE EXTID[17:16]
2
2
EXTID[17:16]
EXTID_LAFM
EXTID_LAFM
1
1
[17:16]
[17:16]
0
0
Word/LW
Word/LW
Word/LW
Word/LW
Word
Word
Word
Word
REJ09B0313-0300
LAFM Field
LAFM Field
Control 0
Control 0