DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 123

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(1)
In the reset state, the CPU is reset. There are two kinds of reset, power-on reset and manual reset.
(2)
The exception handling state is a transient state that occurs when exception handling sources such
as resets or interrupts alter the CPU’s processing state flow.
For a reset, the initial values of the program counter (PC) (execution start address) and stack
pointer (SP) are fetched from the exception handling vector table and stored; the CPU then
branches to the execution start address and execution of the program begins.
For an interrupt, the stack pointer (SP) is accessed and the program counter (PC) and status
register (SR) are saved to the stack area. The exception service routine start address is fetched
from the exception handling vector table; the CPU then branches to that address and the program
starts executing, thereby entering the program execution state.
(3)
In the program execution state, the CPU sequentially executes the program.
(4)
In the power-down state, the CPU stops operating to reduce power consumption. The SLEEP
instruction places the CPU in sleep mode, software standby mode, or deep standby mode.
(5)
In the bus-released state, the CPU releases bus to a device that has requested it.
Reset State
Exception Handling State
Program Execution State
Power-Down State
Bus-Released State
Rev. 3.00 Sep. 28, 2009 Page 91 of 1650
REJ09B0313-0300
Section 2 CPU

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