DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1643

no-image

DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
[Legend]
I:
O:
H:
L:
Z:
K:
Notes: 1. Indicates the power-on reset by low-level input to the RES pin. The pin states after a
I/O port
H-UDI
Emulator*
Type
Input
Output
High-level output
Low-level output
High-impedance
Input pins become high-impedance, and output pins retain their state.
15
PA7 to PA0
PB12
PB11 to PB8
PB7 to PB0
PC14 to PC2, PC0
PC1
PD15 to PD0
PE15 to PE0
PF30 to PF0
TRST
TCK
TDI
TDO
TMS
AUDSYNC
AUDCK
AUDATA3 to AUDATA0
ASEBRKAK/ASEBRK
Pin Name
power-on reset by the H-UDI reset assert command or WDT overflow are the same as
the initial pin states at normal operation (see section 25, Pin Function Controller (PFC)).
Pin Function
I
O
I/O
I
I/O
I/O
I/O
I/O
I/O
I
I
I
O/Z*
I
Z
Normal
State (Other
than States
at Right)
14
Z
Z
Z
I
Z
Z*
Z*
Z
I
I
I
O/Z*
I
Z
Power-
On
Reset*
5
5
Reset State
14
1
Z
O/Z*
K/Z*
I
K/Z*
K/Z*
K/Z*
K/Z*
K/Z*
I
I
I
O/Z*
I
Z
Pin State
Retained*
Rev. 3.00 Sep. 28, 2009 Page 1611 of 1650
7
7
7
7
7
7
7
14
Pin State
2
Deep
Standby
Mode*
Z
O/Z*
K/Z*
I
K/Z*
K/Z*
K/Z*
K/Z*
K/Z*
Z
Z
Z
O/Z*
Z
Z
Power-Down State
7
7
7
7
7
7
7
14
3
Z
O/Z*
K/Z*
I
K/Z*
K/Z*
K/Z*
K/Z*
K/Z*
I
I
I
O/Z*
I
Z
Software
Standby
Mode
7
7
7
7
7
7
7
14
REJ09B0313-0300
I
O
I/O
I
I/O
I/O
I/O
I/O
I/O
I
I
I
O/Z*
I
Z
Bus
Mastership
Release
Appendix
14

Related parts for DS72030W200FPV