DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 902

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 17 I
17.5
There are six interrupt requests in this module; transmit data empty, transmit end, receive data full,
NACK detection, STOP recognition, and arbitration lost/overrun error. Table 17.4 shows the
contents of each interrupt request.
Table 17.4 Interrupt Requests
When the interrupt condition described in table 17.4 is 1, the CPU executes an interrupt exception
handling. Note that a TXI or RXI interrupt can activate the DMAC if the setting for DMAC
activation has been made. In such a case, an interrupt request is not sent to the CPU. Interrupt
sources should be cleared in the exception handling. The TDRE and TEND bits are automatically
cleared to 0 by writing the transmit data to ICDRT. The RDRF bit is automatically cleared to 0 by
reading ICDRR. The TDRE bit is set to 1 again at the same time when the transmit data is written
to ICDRT. Therefore, when the TDRE bit is cleared to 0, then an excessive data of one byte may
be transmitted.
Rev. 3.00 Sep. 28, 2009 Page 870 of 1650
REJ09B0313-0300
Interrupt Request
Transmit data Empty
Transmit end
Receive data full
STOP recognition
NACK detection
Arbitration lost/
overrun error
Interrupt Requests
2
C Bus Interface 3 (IIC3)
Abbreviation
TXI
TEI
RXI
STPI
NAKI
(TDRE = 1) • (TIE = 1)
Interrupt Condition
(TEND = 1) • (TEIE = 1)
(RDRF = 1) • (RIE = 1)
(STOP = 1) • (STIE = 1)
{(NACKF = 1) + (AL = 1)} •
(NAKIE = 1)
I
Format
2
C Bus
Clocked Synchronous
Serial Format

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