DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 814

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 15 Serial Communication Interface with FIFO (SCIF)
• Receiving Serial Data (Clock Synchronous Mode)
Rev. 3.00 Sep. 28, 2009 Page 782 of 1650
REJ09B0313-0300
Figures 15.15 and 15.16 show sample flowcharts for receiving serial data. When switching
from asynchronous mode to clock synchronous mode without SCIF initialization, make sure
that ORER, PER, and FER are cleared to 0.
No
No
Clear RE bit in SCSCR to 0
Figure 15.15 Sample Flowchart for Receiving Serial Data (1)
Figure 15.16 Sample Flowchart for Receiving Serial Data (2)
Read ORER flag in SCLSR
Read RDF flag in SCFSR
SCFRDR, and clear RDF
Read receive data in
flag in SCFSR to 0
All data received?
Start of reception
End of reception
ORER = 1?
RDF = 1?
No
Yes
Yes
No
Clear ORER flag in SCLSR to 0
Error handling
[2]
[3]
Yes
Overrun error handling
Error handling
[1]
ORER = 1?
End
Yes
[1] Receive error handling:
[2] SCIF status check and receive data read:
[3] Serial reception continuation procedure:
Read the ORER flag in SCLSR to identify
any error, perform the appropriate error
handling, then clear the ORER flag to 0.
Reception cannot be resumed while the
ORER flag is set to 1.
Read SCFSR and check that RDF = 1,
then read the receive data in SCFRDR,
and clear the RDF flag to 0. The transition
of the RDF flag from 0 to 1 can also be
identified by a receive FIFO data full
interrupt (RXI).
To continue serial reception, read at least
the receive trigger set number of receive
data bytes from SCFRDR, read 1 from the
RDF flag, then clear the RDF flag to 0.
The number of receive data bytes in
SCFRDR can be ascertained by reading
SCFRDR. However, the RDF bit is
cleared to 0 automatically when an RXI
interrupt activates the DMAC to read the
data in SCFRDR.