DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 83

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2.1.4
For the nineteen 32-bit registers comprising general registers R0 to R14, control register GBR, and
system registers MACH, MACL, and PR, high-speed register saving and restoration can be carried
out using a register bank. The register contents are automatically saved in the bank after the CPU
accepts an interrupt that uses a register bank. Restoration from the bank is executed by issuing a
RESBANK instruction in an interrupt processing routine.
This LSI has 15 banks. For details, see the SH-2A, SH2A-FPU Software Manual and section 6.8,
Register Banks.
2.1.5
Table 2.1 lists the values of the registers after a reset.
Table 2.1
Classification
General registers
Control registers
System registers
Register Banks
Initial Values of Registers
Initial Values of Registers
Register
R0 to R14
R15 (SP)
SR
GBR, TBR
VBR
MACH, MACL, PR
PC
Initial Value
Undefined
Value of the stack pointer in the vector
address table
Bits I[3:0] are 1111 (H'F), BO and CS are
0, reserved bits are 0, and other bits are
undefined
Undefined
H'00000000
Undefined
Value of the program counter in the vector
address table
Rev. 3.00 Sep. 28, 2009 Page 51 of 1650
REJ09B0313-0300
Section 2 CPU

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