DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 255

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit
31 to 12
11
10, 9
8
7 to 4
3
2
1
0
Bit Name
⎯
ICF
⎯
ICE
⎯
OCF
⎯
WT
OCE
Initial
Value
All 0
0
All 0
0
All 0
0
0
0
0
R/W
R
R/W
R
R/W
R
R/W
R
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Instruction Cache Flush
Writing 1 flushes all instruction cache entries (clears the
V and LRU bits of all instruction cache entries to 0).
Always reads 0. Write-back to external memory is not
performed when the instruction cache is flushed.
Reserved
These bits are always read as 0. The write value should
always be 0.
Instruction Cache Enable
Indicates whether the instruction cache function is
enabled/disabled.
0: Instruction cache disable
1: Instruction cache enable
Reserved
These bits are always read as 0. The write value should
always be 0.
Operand Cache Flush
Writing 1 flushes all operand cache entries (clears the
V, U, and LRU bits of all operand cache entries to 0).
Always reads 0. Write-back to external memory is not
performed when the operand cache is flushed.
Reserved
This bit is always read as 0. The write value should
always be 0.
Write Through
Selects write-back mode or write-through mode.
0: Write-back mode
1: Write-through mode
Operand Cache Enable
Indicates whether the operand cache function is
enabled/disabled.
0: Operand cache disable
1: Operand cache enable
Rev. 3.00 Sep. 28, 2009 Page 223 of 1650
REJ09B0313-0300
Section 8 Cache