DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1281

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.3.8
LDPALCR selects whether the CPU or LCDC accesses the palette memory. When the palette
memory is being used for display operation, display mode should be selected. When the palette
memory is being written to, color-palette setting mode should be selected.
Initial value:
Bit
15 to 5
4
3 to 1
0
R/W:
Bit:
LCDC Palette Control Register (LDPALCR)
15
R
0
-
Bit Name
⎯
PALS
⎯
PALEN
14
R
0
-
13
R
0
-
Initial
Value
All 0
0
All 0
0
12
R
0
-
11
R
0
-
R/W
R
R
R
R/W
10
R
0
-
Description
Reserved
These bits always read as 0. The write value should
always be 0.
Palette State
Indicates the access right state of the palette.
0: Display mode: LCDC uses the palette
1: Color-palette setting mode: The host (CPU) uses the
Reserved
These bits are always read as 0. The write value should
always be 0.
Palette Read/Write Enable
Requests the access right to the palette.
0: Request for transition to normal display mode
1: Request for transition to color palette setting mode
R
9
0
-
palette
R
8
0
-
R
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 1249 of 1650
R
6
0
-
R
Section 24 LCD Controller (LCDC)
5
0
-
PALS
R
4
0
R
3
0
-
REJ09B0313-0300
R
2
0
-
R
1
0
-
PALEN
R/W
0
0