DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 795

Manufacturer Part Number

DS72030W200FPV

MPU, 32BIT, SH7203, ROMLESS, 240QFP

Manufacturer

Renesas Electronics America

Program Memory Size

Digital Ic Case Style

Supply Voltage Range

1.1V To 1.3V

Operating Temperature Range

-20Â°C To +85Â°C

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

For serial communication, the SCIF has an asynchronous mode in which characters are

synchronized individually, and a clock synchronous mode in which communication is

synchronized with clock pulses.

The SCIF has a 16-stage FIFO buffer for both transmission and receptions, reducing the overhead

of the CPU, and enabling continuous high-speed communication. Furthermore, channel 3 has RTS

and CTS signals to be used as modem control signals.

The transmission format is selected in the serial mode register (SCSMR), as shown in table 15.9.

The SCIF clock source is selected by the combination of the CKE1 and CKE0 bits in the serial

control register (SCSCR), as shown in table 15.10.

• Data length is selectable: 7 or 8 bits

• Parity bit is selectable. So is the stop bit length (1 or 2 bits). The combination of the preceding

• In receiving, it is possible to detect framing errors, parity errors, receive FIFO data full,

• The number of stored data bytes is indicated for both the transmit and receive FIFO registers.

• An internal or external clock can be selected as the SCIF clock source.

selections constitutes the communication format and character length.

overrun errors, receive data ready, and breaks.

⎯ When an internal clock is selected, the SCIF operates using the clock of on-chip baud rate

⎯ When an external clock is selected, the external clock input must have a frequency 16 or 8

Asynchronous Mode

times the bit rate. (The on-chip baud rate generator is not used.)

Section 15 Serial Communication Interface with FIFO (SCIF)

Rev. 3.00 Sep. 28, 2009 Page 763 of 1650

REJ09B0313-0300