DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 798
DS72030W200FPV
Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet
1.R5S72030W200FP.pdf
(1686 pages)
Specifications of DS72030W200FPV
Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Section 15 Serial Communication Interface with FIFO (SCIF)
15.4.2
In asynchronous mode, each transmitted or received character begins with a start bit and ends with
a stop bit. Serial communication is synchronized one character at a time.
The transmitting and receiving sections of the SCIF are independent, so full duplex
communication is possible. The transmitter and receiver are 16-byte FIFO buffered, so data can be
written and read while transmitting and receiving are in progress, enabling continuous transmitting
and receiving.
Figure 15.2 shows the general format of asynchronous serial communication.
In asynchronous serial communication, the communication line is normally held in the mark
(high) state. The SCIF monitors the line and starts serial communication when the line goes to the
space (low) state, indicating a start bit. One serial character consists of a start bit (low), data (LSB
first), parity bit (high or low), and stop bit (high), in that order.
When receiving in asynchronous mode, the SCIF synchronizes at the falling edge of the start bit.
The SCIF samples each data bit on the eighth or fourth pulse of a clock with a frequency 16 or 8
times the bit rate. Receive data is latched at the center of each bit.
Rev. 3.00 Sep. 28, 2009 Page 766 of 1650
REJ09B0313-0300
Serial
data
1
Operation in Asynchronous Mode
Figure 15.2 Example of Data Format in Asynchronous Communication
Start
bit
1 bit
0
(LSB)
D 0
(8-Bit Data with Parity and Two Stop Bits)
D 1
One unit of transfer data (character or frame)
D 2
Transmit/receive data
D 3
7 or 8 bits
D 4
D 5
D 6
(MSB)
D 7
Parity
bit
1 bit
or
none
0/1
1
Stop bit
Idle state (mark state)
1 or 2 bits
1
1
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