DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1087

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(7)
• The 224-byte data FIFO register (FLDTFIFO) is incorporated for data transfer of flash
• The 32-byte control code FIFO register (FLECFIFO) is incorporated for data transfer of
(8)
• By individually specifying the destinations of data and control code of flash memory to the
(9)
• The operating clock (FCLK) on the pins for the AND-/NAND-type flash memory is generated
• The division ratio can be specified by the FCKSEL bit and the QTSEL bit in the common
• Before changing the CPG specification, the FLCTL must be placed in a module stop state.
• In NAND-type flash memory, the FSC and FWE pins operate with the FCLK frequency. In
memory.
control code.
DMA controller, data and control code can be sent to different areas.
by dividing the peripheral clock (Pφ).
control register (FLCMNCR).
AND-type flash memory, the FSC pin operates with the FCLK operating frequency and the
FWE pin operates with a frequency half the FCLK operating frequency. The operating
frequencies must be specified within the maximum operating frequency of memory to be
connected.
Data Transfer FIFO and Data Register
DMA Transfer
Access Time
Section 22 AND/NAND Flash Memory Controller (FLCTL)
Rev. 3.00 Sep. 28, 2009 Page 1055 of 1650
REJ09B0313-0300

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